Design Philosophy
After a lot of thinking and learning, studying projects on the Internet, talking with other people, listening to some equipment, I came up with a little list of how I think a DAC should be designed. This is just what I think, and this is not necessarily what others think. No fuss. This is my website after all.
There should be a Douglas Self statue in the Museum of Audio. This man is the inventor of the Blameless amplifier : an amplifier where the designer does not try to invent fancy new things, but instead tries to avoid all the known errors of the past. The resulting topology is elegant and simple, not more complicated that one with a lot more distortion. I never heard a Blameless amp, and I don't think much of THD measurements, but this man has a very cool message to pass : sometimes it is simpler to do it right.
So why not try to make a Blameless DAC ? First, let's list all the known errors to avoid, and their causes. Most commercial designs fail on the majority of these points.
- Noise
- Jitter : Most designs are full of jitter.
- SPDIF used without clock injection
- Jittery clocks (stand-alone crystals, cheap oscillators)
- Noise & Power Supplies (see below)
- Long clock paths
- No reclocking before the DAC
- Noisy powersupply lines
- Improper decoupling
- Improper regulation, noisy regulators
- Sharing of PS between noisy parts (any high speed digital part) and sensitive parts (analog, clock, dac...)
- Improper layout
- Long supply paths
- No chokes on powersuplpy lines
- No concert for the return path(s) of signals and supply currents
- Noise coupling high frequency signal coupling :
- Coupling between high speed digital signals and clock/analog signals
- Bad layout
- Absent, Wimpy, or badly designed ground planes
- Absence of ferrite chokes on supply lines causing large resonating loops everywhere
- Long signal and supply paths
- No concert for the return path(s) of signals and supply currents
- Use of large integrated circuits (non-SMD)
- Sharing gates inside circuits between data and clock
- Digital processing and DAC
- Use of improper DAC chips (one-bit)
- Noisy reference voltages
- (for current output DACs) Not nailing the voltage at the output pin at the value specified by the manufacturer
- Improper digital processing (notably in the oversampling filter)
- Not enough bits of precision
- No dithering back to the actual DAC precision
- Digital volume controls (argh !)
- Analog output stages
- Textbook-designed, opamp lowpass filter output stages, using cheap opamps and caps
- Feeding steep edges to slew limited opamps
- Failing to take care of various strange mechanisms which happen when an opamp enters slew-limited mode (non negligible currents entering the inputs, high distortion, recovery time, memory effects, etc)
- Failure to take into account that opamp NFB falls as frequency increases, thus wreaking havoc when trying to filter HF with slow opamps, thinking that only the passband frequencies matter
- Use of High order filters when simple low order would suffice
- Others
- Muting transistors
- Low quality parts
The list is pretty long. However, most of these errors are not that hard to avoid, and it is possible to avoid whole class of errors by simple measures, like clock injection and good layout. Nonetheless, most commercial (and DIY) projects often pay a lot of attention to a few points (typicaly the output stage) but fail to consider the other errors.
Therefore, here is the design philosophy I will use for this DAC :
- Start with a good DAC chip
- Pay attention to noise, supplies, and layout
- Minimize jitter
- Use clever tricks in the output stage
A friend, Didier, showed me his Audio Note DAC. Non-Oversampling, tube output, a huge, expensive thing. It had its own sonic coloration (a warm, very pleasant one), but apart from that, it really made music. It had a natural, simple way of showing how it was right and all the others were wrong. Thus, I also want this DAC to be non-oversampling.
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